Aries Design Automation, LLC

2705 West Byron Street
Chicago, IL 60618
http://www.aries-da.com
5 Employees

SBIR Award Summary

Total Number of Awards 15
Total Value of Awards $3.13MM
First Award Date 01/01/06
Most Recent Award Date 01/01/13

Key Personnel

Last Name Name Awards Contact
Velev Dr. Miroslav N. Velev 19 Message

15 Awards Won

Phase 1 SBIR

Agency: National Aeronautics and Space Administration
Topic: 12-1-A1.06
Budget: 01/01/13 - 12/31/13

In the proposed project, we will formally verify the correctness of the interaction between a Real-Time Operating System (RTOS) and user processes under various operating scenarios, such as multitasking, interrupt handling, user and kernel mode switching. The formal verification will be done assuming execution on the PowerPC 750 architecture tha...

Phase 1 SBIR

Agency: National Aeronautics and Space Administration
Topic: 12-1-A1.06
Budget: 01/01/13 - 12/31/13

We will develop an efficient Graphics Processing Unit (GPU) based parallel Binary Decision Diagram (BDD) software package, and will also combine it with our GPU-based parallel SAT solver that we are currently developing in a NASA SBIR Phase II project in order to solve much larger and more complex Boolean formulas from formal verification than p...

Phase 1 SBIR

Agency: National Aeronautics and Space Administration
Topic: 11-1-A1.20
Budget: 01/01/12 - 12/31/12

We will develop a prototype of a GPU-based parallel Binary Decision Diagram (BDD) software package. BDDs are a data structure that satisfies some simple restrictions, resulting in a unique representation of a Boolean function regardless of its actual implementation. This property of BDDs allows the efficient solution of many problems. The propos...

Phase 2 SBIR

Agency: National Aeronautics and Space Administration
Topic: 09-2-O1.03
Budget: 01/01/11 - 12/31/11

We will implement an environment for design, formal verification, compilation of code, and performance and power evaluation of Systems on a Chip (SOCs) consisting of heterogeneous processor cores that can be single-issue pipelined, superscalar, or VLIW, and are binary-code compatible with any existing Instruction Set Architecture (ISA). Particul...

Phase 1 SBIR

Agency: Department of Energy
Topic: 40 A-2010
Budget: 01/01/10 - 12/31/10

In this proposed SBIR Phase I project, we will develop a proto

Phase 1 SBIR

Agency: National Aeronautics and Space Administration
Topic: 10-1-O1
Budget: 01/01/10 - 12/31/10

We will design and formally verify a VLIW processor that is radiation-hardened, and where the VLIW instructions consist of predicated RISC instructions from the PowerPC 750 Instruction Set Architecture (ISA). The PowerPC 750 ISA is used in the radiation-hardened RAD750 flight-control computer that is utilized in many NASA space missions, includi...

Phase 2 SBIR

Agency: National Aeronautics and Space Administration
Topic: 10-2-X1
Budget: 01/01/10 - 12/31/10

The hundreds of stream cores in the latest graphics processors (GPUs), and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. In the last 6 years, GPUs had an increasing performance advantage of an order of magnitude relative to x86 CPUs. Furthermore, this performance advant...

Phase 1 SBIR

Agency: National Science Foundation
Topic: IC3-2010
Budget: 01/01/10 - 12/31/10

This Small Business Innovation Research (SBIR) Phase I project will result in an efficient and scalable method for design and formal verification of Chip-Multi-Threaded multicore processors, where the individual cores have hardware support for multi-threading. This method will be developed and optimized on the OpenSPARC T2 processor, a publicly ...

Phase 1 SBIR

Agency: National Aeronautics and Space Administration
Topic: 09-1
Budget: 01/01/09 - 12/31/09

The hundreds of stream cores in the latest graphics processors (GPUs), and the possibility to execute non-graphics computations on them, open unprecedented levels of parallelism at a very low cost. We will investigate ways to efficiently exploit this parallelism in order to accelerate the execution of a Boolean Satisfiability (SAT) solver. SAT h...

Phase 1 SBIR

Agency: Department of Energy
Topic: 2009
Budget: 01/01/09 - 12/31/09

For more than four decades, space-based systems have been used to support the detection of activities associated with the proliferation of weapons of mass destruction. This project will develop efficient and scalable tool to evaluate the robustness of radiation-hardened circuits and to automatically generate recommendations for radiation harden...

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