American Semiconductor, Inc.

310 S. Vista Ave., Suite 230
Boise, ID 83705
http://www.americansemi.com
18 Employees

SBIR Award Summary

Total Number of Awards 19
Total Value of Awards $5.27MM
First Award Date 05/17/02
Most Recent Award Date 02/21/14

19 Awards Won

Phase 2 SBIR

Agency: Air Force
Topic: AF121-003
Budget: 02/21/14 - 02/21/16

ABSTRACT: Emergence and feasibility for flexible body-worn electronics and particularly medical patches requires high performance electronics capability. The problem is that these new technologies must have flexible and conformal physical formats and conventional electronic components are not in any way flexible. In the CLAS Phase I program, a ...

Phase 1 SBIR

Agency: Department of Energy
Topic: 40 E-2013
Budget: 01/01/13 - 12/31/13

Reliable, readily-manufacturable technologies are needed to create the next generation of high-density, high-functionality 3D integrated circuits (ICs) for integrating silicon pixel detectors with CMOS read-out ICs. Current methods for 3D IC development are severely limited by the thickness of the CMOS wafers and the restrictions that result due...

Phase 1 SBIR

Agency: Air Force
Topic: AF121-003
Budget: 04/20/12 - 01/22/13

ABSTRACT: American Semiconductor will develop and demonstrate structural integration of a conformal load bearing antenna structure (CLAS). Future aircraft will incorporate distributed electronics, sensors, and flight control transducers directly into the composite airframe. For near-term Air Force applications, adding RF electronics into the C...

Phase 1 SBIR

Agency: National Aeronautics and Space Administration
Topic: 11-1-S3.01
Budget: 01/01/12 - 12/31/12

The proposed 45 nm radiation hardened platform based structured ASIC architecture offers the performance and density expected of a custom ASIC with the low manufacturing cost associated with a structured ASIC. The low cost, high performance customization of the structured ASIC portion of the chip is made possible by the 1-D 45 nm Mask-Lite proce...

Phase 2 SBIR

Agency: Air Force
Topic: AF093-082
Budget: 09/30/11 - 12/30/13

ABSTRACT: The Space Plug-and-play Avionics (SPA) initiative is designed to improve the ability of the US military to respond to rapidly changing operational needs by creating, integrating, and launching a new spacecraft in less than one week. This would provide major benefits to war fighters on the ground, in the sky, and at sea. SPA-1 ASICs u...

Phase 1 SBIR

Agency: Missile Defense Agency
Topic: MDA10-032
Budget: 06/23/11 - 12/30/11

The goal of this project is to develop an ultra low power (ULP), radiation hardened, reconfigurable analog-to-digital converter (ADC) in the 130nm Flexfet Independently Double Gated SOI CMOS process. Satellites include a large number of sensors which perform both generic system functions and specific mission needs. For these various sensors, t...

Phase 2 SBIR

Agency: Department of Energy
Topic: 44 D-2011
Budget: 01/01/11 - 12/31/11

Existing silicon on insulator (SOI) pixel detectors which integrate single gate transistors with substrate diodes are limited by two key problems. First, the SOI transistor performance is degraded by the large potentials that must be applied to the substrate to fully deplete the diodes. Secondly, the performance of these SOI pixel detectors degr...

Phase 1 SBIR

Agency: Air Force
Topic: AF093-082
Budget: 03/12/10 - 02/11/11

For Phase I, an ultra low power, high performance microprocessor core using a combination of double-gated and independent double-gated Flexfet SOI CMOS technology from American Semiconductor will be designed to address the requirements of military and space communication systems. High integration feasibility using Flexfet technologies followed ...

Phase 1 SBIR

Agency: Department of Energy
Topic: 44 D-2010
Budget: 01/01/10 - 12/31/10

Improvements in silicon-on-insulator (SOI) technology have resulted in development of monolithic chip designs for radiation image sensors and particle detectors by facilitating the use of the handle silicon layer for the detectors and the SOI layer for the readout circuits. Unfortunately, even the most advanced SOI-based imagers are still limit...

Phase 1 SBIR

Agency: Missile Defense Agency
Topic: MDA08-023
Budget: 04/08/09 - 10/08/09

The is an effort to increase radiation hardness/survivability of microelectronics through innovation of production processes and capabilities by establishing an economically viable low-volume sub-65nm rad-hard foundry CMOS capability based on Digital Beam Processing (DBP) technology. American Semiconductor (ASI) and Digibeam Corporation (DBC) pr...

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