Deep-Level-Free SiC Semi-Insulating Buffer Layers for High-Power RF Transistors 02-014A

Period of Performance: 04/18/2002 - 10/17/2002

$70K

Phase 1 SBIR

Recipient Firm

Semisouth Laboratories
201 Research Blvd.
Starkville, MS 39759
Principal Investigator

Abstract

SemiSouth proposes a proprietary technology involving the passivation of one type of shallow acceptor impurity to achieve precision compensation of the opposite type of shallow donor impurity. This Phase I feasibility demonstration represents an innovative breakthrough in deep-level-free semi-insulating (SI) buffer layers for high-performance, economical silicon carbide radio-frequency (RF) MEtal Semiconductor Field Effect Transistors (MESFET). Semi-insulating materials are widely used in electronics, which is especially so in RF applications. SI materials are now commercially available in SiC as substrates with very high bulk resistivity. However, RF MESFET's are known to be susceptible to electrical instabilities arising from the deep energy levels intentionally introduced into all currently practical SI material. The deep energy levels are necessary to compensate, meaning to electrically offset, the shallow doping impurities to produce very high electrical resistance. These same deep levels produce trapping effects that are responsible for the electrical instabilities. Until now, it was not practical to create semi-insulating buffer layers by using "shallow" dopants of one type (say aluminum acceptors in SiC) to compensate shallow dopants of another type (say nitrogen donors in SiC) with sufficient precision to produce deep-level-free SI buffer layers. The approach developed by SemiSouth reduces or eliminates the electrical instabilities observed with MESFET's by eliminating the deep traps previously inherent to all SiC SI materials. Commercial development of lateral SiC RF power transistors (MESFET's) for the L/S-band has had mixed results. On the one hand, they are currently the most viable wide bandgap RF transistors for this frequency range and the technical benefits of using SiC have been demonstrated in these devices. On the other hand, chronic electrical instabilities called "backgating" have reduce the yield and driven up the cost of manufacturing these devices despite the commercial availability of high-purity vanadium-free semi-insulating (SI) substrates, thus limiting their acceptance in both the commercial and the defense markets. Commercial development of new buffer layers has just begun. This problem is dealt with in GaAs using a combination of high-purity SI substrates and modifications to the substrate/channel buffer layer using selective ion implantation. Ion implantation of SiC buffer layers is less practical, but the innovative patent-pending materials process developed by SemiSouth Laboratories under license from Mississippi State University results in a cost-effective and analogous alternative to the proven buffer technology used in GaAs. There are multiple approaches for a successful feasibility demonstration and development of this technology to have commercial outlet, including licensing of the process and/or application of the process by SemiSouth to substrates prior to device fabrication, thus allowing DoD prime contractors already supplying these parts to transition the benefits of this research to the DoD market place. The cost-effectiveness of this approach will increase yields and reduce overall manufacturing costs, thus enhancing commercial acceptance of SiC power MESFET's wherever higher bandwidth and higher power are simultaneously required, such as the growing digital wireless telecommunications and broadcast markets.