A Complete Design Environment for Asynchronous Circuits

Period of Performance: 01/07/2003 - 09/14/2003

$99K

Phase 1 SBIR

Recipient Firm

Architecture Technology Corp.
9971 Valley View Road Array
Eden Prairie, MN 55344
Principal Investigator

Abstract

Theoretical research on asynchronous circuits has provided top﷓down methods that start from an operational description of a circuit. Top-down methods avoid the difficulty of understanding (let alone verifying) the behavior of compositions of asynchronous components. In practice, however, design begins from a functional decomposition, often incorporating components previously designed. ATC-NY will develop a mathematically based, automated tool that allows asynchronous components and their behaviors to be designed and specified by compositional methods familiar to users of VHDL and Verilog. The tool will support an extensible design language, AHDL, that generalizes VHDL and can also incorporate components designed by other means. It will support both simulation (exploiting VHDL simulators) and formal verification of functional correctness. By integrating this tool with a suite of existing tools that perform top-down design, low-level synthesis, optimization, power estimation, and layout we support a complete design method that allows users to mix top-down and compositional steps, and to verify code either by simulation or by full formal proof. Asynchronous microprocessors offer the promise of high performance with low power consumption. The commercial development of asynchronous processors has been hindered by a lack of design tools. The introduction of powerful tools for asynchronous design opens up a vast market. Such tools will make possible the design of a new generation of asynchronous circuits with superior performance - circuits useful for high-performance sensing, communication, and processing for current and future military systems.