Low Defect Density Mercury Cadmium Telluride on Silicon by Bulk Layer Transfer

Period of Performance: 08/17/2012 - 08/16/2014


Phase 2 STTR

Recipient Firm

Srico, Inc.
Columbus, OH 43235
Principal Investigator
Firm POC

Research Institution

University of Illinois, Chicago
809 S Marshfield RM 608
Chicago, IL 60612
Institution POC


The goal of this STTR project is to develop an engineered growth substrate technology that will enable low defect MCT growth on silicon that is comparable in defect density to MCT grown on lattice matched CZT substrates. The layer transfer process elements demonstrated in Phase I will be further optimized to produce low defect density MCT on silicon substrates in Phase II. SRICO will achieve this by physical layer transfer of a bulk quality CZT layer to silicon by using wafer scale methods essentially the same as those used in the highly successful Smart-cut silicon-on-insulator (SOI) process. The effort will leverage SRICO s state-of-the-art ion-slicing techniques for maintaining growth surface layer quality. Process optimization and small scale demonstration of quality MCT growths on engineered growth substrates will be performed in collaboration with SRICO s STTR partner. Phase II would focus on optimization and scaling up of the technology and on demonstration of FPA device elements formed in the grown MCT films on the engineered substrates.