Cognitive Processing Hardware Elements

Period of Performance: 06/19/2004 - 02/18/2005


Phase 1 SBIR

Recipient Firm

Hoplite Systems LLC
3900 White Settlement Rd. #183
Fort Worth, TX 76107
Principal Investigator


Hoplite Systems LLC proposes to implement the Soar cognitive architecture within a Field Programmable Gate Array (FPGA). This system, called the RAISE (Reconfigurable Architecture for Improved Soar Execution) will demonstrate that an FPGA's parallel, reconfigurable, multi-clock capabilities enable significantly better Soar processing performance than a traditional CPU. Hoplite will also develop the Graphical User Interface needed to enter and send production rules to the FPGA/Soar system. Both the RAISE software and the hardware will be tested using a traditional problem for evaluating decision-making processes.