Advanced Processing Electronics DRFM

Period of Performance: 04/19/2012 - 10/19/2012


Phase 1 SBIR

Recipient Firm

Systems & Processes Engineering Corp
7050 Burleson Road
Austin , TX 78744
Principal Investigator


This program will develop advanced processing methods to lead to state-of-the-art advancements in real-time threat-representative electronic attack (EA) Digital Radio Frequency Memory (DRFM) test emulators. The Advanced Processing Electronics DRFM will utilize high performance analog-to-digital and digital-to-analog conversion, and ultra-high performance FPGAs to realize significant improvements over existing DRFM technology. Dynamically reconfigurable digital filters and high bit width digital convertors are used to provide artifact suppression to meet or exceed 70 dB SFDR. Traditional DRFM techniques generation is supported by integrated Digital Frequency Discrimination (DFD) and proven PRI Tracker technology. High sample rate convertors and onboard memory are provided to support at least 64 µs of delay with 285 ps resolution. The envisioned system will support multiple target/scatterers or may be reconfigured to act as multiple independent DRFMs. This program leverages and complements SPEC s current commercialized Agile Digital Effects Processor (ADEP) product lines, provides EW system hardware-in-the-loop capabilities for simulators, range support, and air, ground and naval EW operations. The proposed Advanced Processing Electronics DRFM will provide Electronic Warfare (EW), Test & Evaluation and commercial customers with state-of-the art performance in latency, dynamic range and instantaneous bandwidth providing significant improvements in the ability to defeat cutting-edge radar systems.