Advanced Multi-Layer Phased-Array Interconnect Technology

Period of Performance: 02/20/2009 - 02/19/2011

$1000K

Phase 2 SBIR

Recipient Firm

Applied Radar, Inc.
315 Commerce Park Road, Unit 3
North Kingstown, RI 02852
Principal Investigator

Abstract

The design and development of scalable panel-based phased-array radars requires the high density integration of solid-state components and adequate thermal mitigation within the array lattice constraints. The current integration technologies such as system-on-a-chip (SOC), multi-chip-module-deposition (MCM-D), and system-on-package (SOP), will help miniaturizing sub-modules for various functional layers of the system, but they are not the only solutions. For large phased-array with scalable capability, they need a high density interconnect (HDI) platform to provide functional integration for board-to-board transitions and on-board interfaces with large input/output counts within a limited area constrained by the array lattice and efficiency of networking. The HDI platform is need to combine with advanced multi-layer board technology in order to integrate active devices, provide the required RF manifold, DC power and digital control to the array, while providing adequate heat sinking for the phased-array. In Phase II, a prototype sub-module will be developed utilizing the developed HDI platform which integrates active array components into a demonstration sub-array. The developed HDI platform will be made to provide a compatible board-to-board interface and efficient network for the SOC, MCM-D and SOP technologies. The target frequency range is X-band, but the developed technology could be extended to other frequency ranges.