Systems on a Chip Created Using Extended Requirements Language

Period of Performance: 06/27/1997 - 06/30/1998


Phase 1 STTR

Recipient Firm

Edaptive Computing, Inc.
1245 Lyons Road Array
Dayton, OH 45458
Principal Investigator

Research Institution

University of Cincinnati
College of Engr. & Appl. Sc. 2901 Woodside Drive
Cincinnati, OH 45221
Institution POC


This research, to be conducted by EDAptive Computing Inc. and the University of Cincinnati will develop a unique and commercially viable solution to the problem of specifying the requirements and intended function of mixed-technology systems-on-chip (SOC) for synthesis. Our Systems On a Chip Created using Extended Requirements language (SOCCER) program will apply DARPA and AF-sponsored language developments in VSPEC, SimSpec, and VHDL-AMS, synthesis techniques developed under a USAF-sponsored mixed-signal synthesis program, and analyzer developments performed under the USAF-sponsored SAVANT program, in a focused approach to establish feasibility in Phase I. Specific Phase I Objectives are to (1) Define requirements, (2) Identify and evaluate candidate languages, tools and technologies, (3) Develop languages and tools, (4) Demonstrate technical feasibility through preliminary design and prototyping, and (5) Establish commercial product feasibility and potential. The Phase II result will be an ESDA tool suite which will, given a declarative mixed-technology system specification in extended VSPEC, translate input specifications into a functional, synthesizable VHDL-AMS description. This will not only be technical solution to the problem of specifying the requirements and intended fuction of mixed-technology SOC for synthesis but a basis for immediate transition into a commercial product.