Periodic Silicon-Carbide Limiter

Period of Performance: 06/02/2000 - 12/02/2000


Phase 1 STTR

Recipient Firm

Mission Research Corp.
735 State Street
Santa Barbara, CA 93101
Principal Investigator
Firm POC

Research Institution

Johns Hopkins University
11101 Johns Hopkins Rd
Laurel, MD 20723
Institution POC


An X-band high-power limiter is proposed using silicon carbide (SiC) field-effect transistors (FETs). To achieve operation between 7 to 11 GHz the limiter circuit will consist of a periodic array of FETs connected together with bond wires. The parasitic capacitance of the FETs and the inductance of the connecting wires will form a synthetic transmission line with a characteristic impedance of 50 . The concept will be tested in Phase One using L-band FETs that are immediately available. The use of SiC instead of gallium arsenide or silicon will enable the bandwidth to be achieved with much lower insertion loss. The reason for this is that SiC can operate at much higher temperatures and has higher thermal conductivity than either gallium arsenide or silicon. Therefore the combined periphery of all the FETs in the circuit can be substantially smaller, and this reduces the losses. A broad-band SiC FET-based limiter offers unsurpassed performance with wide military and commercial applications. Due to its small footprint and tolerance to high temperature, it is ideally suited for upgrading systems already in wide use. In addition, it will provide protection from high-power pulsed sources - an area just beginning to be addressed by military planners. Similarly, as the exploding wireless technology floods the commercial market, needs will be surfacing for similar protection for these products.