Multi-Algorithm Satellite Reconfigurable Architecture in Order to Counter Intelligent Jamming

Period of Performance: 03/17/1998 - 12/17/1998


Phase 1 SBIR

Recipient Firm

Orincon Corp.
4770 Eastgate Mall
San Diego, CA 92121
Principal Investigator


The recent explosion in satellite communications has propelled a concurrent effort in flexible satellite communications systems architectural design. Satellite constraints and other pressures have led developers to seek new architectures for more robust application-specific adaptive signal processing that can be housed in more compact form factors, has lower power and weight requirements, has more processing capacity, and is cost-effective and flexible. Here, ORINCON proposes a novel approach that consists of a number of interconnected processors operating in pipelined and parallel modes to support several types of adaptive nulling algorithms. The design will comprise a mixed architecture with Field Programmable Gate Arrays and Field Programmable Interface Connections for programmable interconnects for programmable logic, ASIC's; such as DSP chips for the floating point operations, and CORDIC processors for coordinate rotations to triangularize matrices. Innovative hardware platforms, such as the novel architecture mentioned above, blur the traditional boundaries that exist between hardware and software bringing out the best features of both environments. Configware systems that allow for field reprogrammability as in the proposed satellite architecture are fundamentally defined by their ability to adapt or completely reconfigure themselves, making them suitable for a host of traditional adaptive nulling algorithms.