Epitaxial Liftoff for Low Power Reduced Parasitics Multi-Chip Modules

Period of Performance: 04/22/1998 - 04/10/1999


Phase 1 SBIR

Recipient Firm

ELO Technologies, Inc.
3205 Ocean Park Blvd, Suite 120
Santa Monica, CA 90405
Principal Investigator

Research Topics


The objective of this effort is to develop ultra-low power semiconductor packaging techniques for Multi-Chip Modules. Substrate parasitics contribute to excess power consumption of semiconductor devices. Through substrate removal techniques, capacitance can be lowered and operating power can be significantly reduced. By thinning the semiconductor chip to the thickness of the device only, with no substrate, we can both eliminate stray substrate parasitics and reduce interconnect parasitics therefore reducing total power consumption.As semiconductor device frequencies climb, so, proportionally, does substrate parasitic power consumption. Through ELO, parasitics to the semiconductor substrate are completely eliminated. As an added benefit, the devices can be mounted directly to the heat sink without the thermally insulting substrate impeding heat sinking. Through epitaxial liftoff for MCMs, we can reduce semiconductor power consumption, reduce package interconnect power consumption, and improve heat sink efficiency all at the same time.