Dynamic Module Server for Routing-Driven FPGA Defragmentation

Period of Performance: 05/10/2006 - 05/05/2008


Phase 2 SBIR

Recipient Firm

Luna Innovations, Inc.
301 1st St Suite 200
Roanoke, VA 24011
Principal Investigator


Luna Innovations proposes to develop a set of Dynamic Module Servers (DMS) that manage dynamically reconfigurable modules to prevent fragmentation in runtime-reconfiguring FPGA applications. The DMS will be capable of maximizing the available contiguous FPGA resources by efficiently floorplanning the modules currently running on the FPGA. While many FPGA defragmentation approaches model the FPGA as a two dimensional (2D) memory grid and the configurable elements running on the FPGA as easily distributable blocks in that grid, such modeling simplifies the real-world complexities of routing between the interrelated configurable elements and external I/O. Luna s proposed Dynamic Module Server will take into account not only fragmentation within the FPGA, but it will also provide for module interconnections and external I/O connections by pre-compiling both the modules and their interconnects. This simplifies the runtime routing of these modules because most of the work will have been performed at compile time. Optional pre-computations allow connections to be incorporated in the module s bitstream without incurring any runtime overheads. The Dynamic Module Server will be useful in embedded, networked, and supercomputing environments. The DMS can control reconfiguration on a variety of real-world FPGAs, including the Xilinx Virtex-II, Virtex-II Pro, and Virtex 4 FPGA families.