Efficient and Accurate Coupled Circuit and Substrate Simulation for Radiation Hard Electronics

Period of Performance: 09/20/2006 - 09/19/2008


Phase 2 SBIR

Recipient Firm

Robust Chip, Inc.
7901 Stoneridge Drive Suite 226
Pleasanton, CA 94588
Principal Investigator


The key innovation of the proposal is a novel, fast and accurate, algorithm (patent pending) to simulate substrate effects, in particular single event transients (SETs), in semiconductor circuits. This new method opens up a new capability for circuit designers to study a large set of substrate and layout related effects using simulation, helps them to make good choices regarding circuit design and layout, and greatly reduces the number of tests/experimental manufacturing lots required. In phase I we developed and demonstrated the novel simulation method. We showed that this method is as accurate as TCAD simulation at the device level, while being much faster (10-100X), and allowing the simulation of circuit response for circuits with 1000 s of transistors. In phase II we will develop this method into a production strength design tool, verify and calibrate simulation models by comparing to measurements, and use the method to investigate and develop novel radhard design concepts, built-in soft error resilience (BiSER), which reduce soft error rates in digital logic, with a minimum of area, power, and speed penalty.