Unified Memory Architecture

Period of Performance: 04/24/1998 - 10/24/2000


Phase 2 SBIR

Recipient Firm

Integrated Microtransducer Electronics
1214 Oxford Street
Berkeley, CA 94709
Principal Investigator


The opportunity exists to replace the various memory technologies presently used in computers with a single memory type called PRAM, a nonvolatile, magnetic memory based on giant magnetoresistance (GMR) under development by the proposer. This unification will increase speed, lower power consumption, eliminate rotating storage, provide nonvolatility, and improve reliability. The problems with presently used memories are that SRAM and DRAM are volatile. Flash has slow write and limited write cycles, and rotating disk is unreliable and excessively slow. The proposed project will (1) fabricate and charcterize PRAM chips with different designs, (2) develop an operating system and a controller for an architecture in which DRAM and rotating disk are replaced by PRAM counterparts, and (3) develop an intrinsically radiation hard, all-metal PRAM chip in which both electronics and memory are implemented with GNR films. Staged development will lead to a 1 Mbit PRAM chip with 2 micron minimum features and work toward 0.2 micron technology. A result in preprototype commercial chips for replacement of Flash and DRAM, establish the viability of a unified memory architecture, and demonstrate the simplicity of all-metal fabrication.