Ultra-scaleable Vertical Transport GMR Devices

Period of Performance: 05/21/2003 - 04/30/2005

$436K

Phase 2 SBIR

Recipient Firm

NVE Corp. (formerly Nonvolatile Electron
11409 Valley View Rd.
Eden Prairie, MN 55441
Principal Investigator

Abstract

Under the Phase II SBIR program, "Ultra-scaleable Vertical Transport GMR Devices," NVE Corporation will advance vertical transport giant-magnetoresistance random access memory, VMRAM, technology by developing parallel processing protocols necessary to fabricate deep sub-micron GMR devices. The value of VMRAM lies in its scaleability, and the ability to manufacture devices beyond standard photolithographic capability is critical to the success of the program. Fundamental parallel processing concepts were demonstrated in the Phase I effort. The primary goal of the Phase II effort is to fabricate, test, and demonstrate VMRAM cells and arrays using these innovative techniques. Specific program objectives are: A) develop unit parallel processes for fabricating VMRAM cells; B) develop unit processes for fabricating wordlines; C) unify cell and word line processes and fabricate complete unit VMRAM cells; D) characterize and identify limiting factors in VMRAM cells; and E) revise VMRAM cell designs to reflect optimization and maximum scaling. Bridge Option objectives are: A) insert packaged VMRAM arrays into existing VMRAM test modules; B) complete the physical design for a single chip integrated memory; and C) fabricate a fully integrated single chip memory. Success in Phase II will result in production of a 2k VMRAM prototype for commercialization in Phase III. Vertical MRAM is applicable in general ultra-dense, nonvolatile random-access memory, "inaccessible"or non-retrievable information storage applications, and as a potential hard disk replacement. NVE will benefit in the way of technology licensing and applying the technology to niche memory applications.