Process Development and Integration Non-destructive Ferroelectric Memory

Period of Performance: 09/14/1990 - 09/14/1992

$477K

Phase 2 SBIR

Recipient Firm

Symetrix Corp.
5055 MARK DABLING BLVD., SUITE 100
Colorado Springs, CO 80918
Principal Investigator

Abstract

Research has been accomplished in the fabrication processes leading to the integration of sol-gel PZT ferroelectric with GaAs substrates to produce radiation hard NDRO memory devices. As a result of this research, a new ferroelectric material, replacing the PZT, is being developed and tested. The new material uses threshold voltage hysteresis in a ferroelectric field effect transistor (F-FET) configuration for NDRO. The deposition process parameters are being established and fabrication techniques developed to produce radiation hardened, fast access, ferroelectric CMOS, NDRO memory devices. These memory devices may replace EEPROM and magnetic bubble devices, and have extensive application in space electronic devices, for sensors, control systems, and communications.