3D Hyperspectral Processor

Period of Performance: 05/11/1998 - 05/11/2000


Phase 2 SBIR

Recipient Firm

Irvine Sensors Corp.
3001 Red Hill Avenue, B3-108 Array
Costa Mesa, CA 92626
Principal Investigator

Research Topics


ISC proposes an innovative interface to its 3D Analog Neural Network (3DANN) processor engine which will greatly expand its image processing capabilities and enhance its real time hyperspectral processing. ISC proposes replacing the 3DANN's current passive motherboard with an active input-output substrate. The current substrate fixes the 3DANN's kernel size to 64 by 64 pixels, and forces single precision 8 bit analog multiply and sums. The active substrate will allow programmable kernel sizes which can be ideally matched to the one dimensional (1 by 256, for example) hyperspectral images. The active substrate would also facilitate double precision multiply and sums. Up to 16 bit digital information could be processed using 9 bit or 16 bit weighted multiplying vectors. ISC proposes to take advantage of and enhance the technology of stacking application specific neural processing integrated circuits funded by millions of government and private dollars. The 3DANN processor is capable of performing at terra ops speeds (10(12) multiply and adds per second). This capability can optimally be applied to hyperspectral processing using the active substrate. ISC will design and fabricate an active substrate and integrate it with a 3DANN processor, performing verification electrical tests in the Phase II program.