Development of an InP Based Integrated High Speed Photoreceiver

Period of Performance: 02/23/1995 - 02/23/1997


Phase 2 SBIR

Recipient Firm

Discovery Semiconductors, Inc.
Ewing, NJ 08628
Principal Investigator

Research Topics


We propose to develop a novel technology for fabricating high speed integrated photoreceiver MMIC chips on InP substrate. In Phase I of this program, we successfully designed and fabricated a new, "Dual Depletion, Optically Resonant, High Speed In 0.53 Ga 0.47 Photodetectors." The 3 dB cutoff frequency for a 50 um diameter photodetector was 5.3 GHz at a reverse bias of 3V. We also investigated different monolithic integration methods, and have chosen a "vertical integration" approach in Phase II, as it does not require a complicated "selective epitaxy" crystal growth technique, thus, making integration approach far simpler. In Phase II of this program, we will optimize the photodetector technology developed in Phase I, and also design InP based millimeter wave transimpedance amplifiers. Our overall goal is to develop a technology for manufacturing integrated photoreceivers consisting of an InGaAs photodetector and an InP transimpedance amplifier with a frequency response up to 44 GHz and sensitivity of -30 dBm.