Non-volatile, VHSIC-density, Neural Network Chip with Variable Wafer Dicing

Period of Performance: 09/16/1993 - 09/16/1995

$562K

Phase 2 SBIR

Recipient Firm

Oxford Computer, Inc.
Oxford, CT 06478
Principal Investigator

Research Topics

Abstract

Flexible, powerful, neural network chips are required to solve many vital DoD and commercial problems in real-time. Adequate chips are not available. The A236 Chip will satisfy these needs. During Phase I, we conceived and demonstrated the architecture for a flexible, powerful, very low pin-count, VHSIC-density, digital neural network chip, the "A236 Chip", that combines memory, processing, control and communications into one. We identified specific commercialand government customers who have applications for this chip, and have begun working with some of them on their applications in anticipation of its availability. During Phase II, we propose: (1) model the A236 Chip and common neural networks using the DoD's VHSIC Hardware Description Language (VHDL), (2) lay out and build the Chip using submicron, CMOS technology, (3) write an easy to use, icon-based, "Application Builder" program that runs under Microsoft Windows to enable users to quickly implement common neural networks on an A236 Chip, (4) build an evaluation board to test and demonstrate the Chip, and (5) demonstrate a real-time neural network application using the A236 Chip. Optionally, we also propose to: (1) build a multichip moduel using eight unpackaged A236 dice to provide even more computation power in a small package, (2) guild an evaluation board for the module, and (3) extend the Application Builder to implement neural networks built from multiple A236 Chips.