Analog Co-Processors for Complex System Simulation and Design

Period of Performance: 03/21/2016 - 01/20/2017

$154K

Phase 1 STTR

Recipient Firm

Areté Associates
9301 CORBIN AVE Suite 2000
Northridge, CA 91324
Firm POC
Principal Investigator

Research Institution

University of Virginia
351 McCormick Rd ECE Dept., Thornton Hall
Charlottesville, VA 22904
Institution POC

Abstract

It has long been known that analog computers can be faster and more power efficient than digital processors by many orders of magnitude. Until the 1970s analog computers were the dominant controllers in most industrial and military applications. Even today digital processors are still slower and more power consumptive than analog, but offer much more flexibility (programmability) and precision. The fist hybrid approach to combine the best of both technologies dates to 1971 where a hybrid analog/digital design solved the heat equation ten times fast than the comparable digital computer but the demonstration used discrete components and was not practical for large problems. In 2006, Cowan used essentially the same architecture but in VLSI to solve the same heat equation 100x faster and with 1% of the power of the comparable digital processor and was shown to be scalable. We propose to extend Cowans work to second order in time and incorporate the latest advances in programmability from the FPAA community to design a true programmable, hybrid processor capable of direct solution of systems of non-linear PDEs and verify via simulation the same 100x, 1% performance of Cowan. Fabrication of a VLSI chip will be the focus of Phase II.