Improving the Response of Silicon Carbide Devices to Cosmic Radiation

Period of Performance: 06/10/2016 - 12/09/2016

$125K

Phase 1 SBIR

Recipient Firm

CoolCAD Electronics, LLC
7101 Poplar Avenue
Takoma Park, MD 20912
Firm POC
Principal Investigator

Abstract

The ultimate goal of this proposal is to provide NASA space SEE and TID tolerant high voltage and low on-resistance silicon carbide power devices that meet the capability performance goals in the NASA technology roadmap. These objectives are important for the upcoming missions such as Io Observer, Saturn probe and Europa. Additionally, improving the single event / radiation hardness of silicon carbide devices would benefit the Orion spacecraft project in terms of power and advanced space power systems in terms of mass. Specifically mass savings are tremendous with the use of radiation hardened high voltage and power devices: A possible use of 300 V solar arrays instead of the 120 V option for solar electric propulsion would decrease the payload by as much as 2.5 tons with larger voltage operation resulting in further weight cuts. This is only practically achievable using radiation hardened silicon carbide devices as the silicon on-resistance versus radiation hardening penalty renders the silicon option not beneficial for conversion efficiencies. To achieve space SEE and TID tolerant silicon carbide power devices, we will follow two parallel paths. First, we are partnering with Cree (Wolfspeed) to determine heavy ion and TID susceptibility of their Gen2 1200 V power MOSFETs. We will also devise experiments to understand and identify failure mechanisms leading to the measured behavior. In Phase I, we will pursue these experiments, and start device modeling these Gen2 devices. In Phase II, we will build on this foundation to come up with possible rad-hard designs that will be newly fabricated and tested. Second, CoolCAD also plans to design, lay out and fabricate JFET based silicon carbide high voltage / power devices. This provides an alternative to Cree's MOS based power device. In Phase I, we will fabricate a prototype JFET power device, and plan to also heavy ion test this device to determine its vulnerability to heavy ions and TID.