Reconfigurable Memory or Central Processing Unit (CPU) Instruction Architecture

Period of Performance: 01/01/2014 - 12/31/2014


Phase 1 SBIR

Recipient Firm

Lewis Innovative Technologies, Inc.
110 Johnston St, SE
Decatur, AL 35601
Principal Investigator


Lewis Innovative Technologies, Inc. (LIT) proposes a reconfigurable memory addressing architecture that provides both hardware and software protection. The LIT system obfuscates (modifies) the memory address of critical data interface with a data/software binding technique. Approved for Public Release 14-MDA-8047 (14 Nov 14)