SBIR Phase I: Ultra Power-efficient Biologically-Inspired Integrated Circuit Architectures for the Processing and Classification of Analog Sensor Signals

Period of Performance: 01/01/2014 - 12/31/2014

$150K

Phase 1 SBIR

Recipient Firm

MAVRIC Semiconductor Inc
Ford Environmental Science & Technology Building, Array
Atlanta, GA 30332
Principal Investigator, Firm POC

Abstract

This Small Business Innovation Research (SBIR) Phase I project demonstrates the disruptive energy-efficiency advantages of neural classifier approaches for context aware applications (embedded systems incorporating a multiplicity of sensors to autonomously infer their current state in noisy conditions). The value proposition benefits a wide range of consumer (wearable computing), telecommunication (mobile handset), industrial (internet-of-things edge nodes), medical (eHealth, portable medical devices, implanted devices), and military (autonomous control drones) applications which incorporate multiple sensors and where battery life/small form factor/product weight/device accuracy trade-offs are concerns. We address the digital signal processing power consumption problem, which requires engineers designing battery-powered systems to make undesirable product trade-offs. Our proprietary mixed signal approaches uniquely close this traditional power/performance gap, solving a long-standing challenge for battery-powered/autonomously powered devices. The broader impact/commercial potential of this project includes disruption of traditional design approaches for battery-powered intelligent devices, accelerated scientific research, more efficient mixed signal electronic curriculum, new classes of portable devices that enhance the human condition and extend healthy life, and job creation. This project will demonstrate fundamental breakthroughs which can subsequently be extended to create a new generation of low-power configurable computing devices with potential impact matching the commercialization of earlier break-through digital technologies (FPGA, GPU, embedded processor). Over the past 30 years, handheld electronics have improved energy efficiency 1000X; our approach enables another factor of 1000 improvement in energy efficiency for potential applications. With advances in the tool-chain, experimental hardware from diverse scientific disciplines (neuroscience) incorporating FPAA technology will implement formerly impractical algorithms, achieving fresh scientific insights. Eventual tool enhancements support opportunities in engineering and computer science laboratory sensor-related curriculum. The initial wearable computing target market was based on strong technology-market fit, accelerated product adoption cycles, and a $300M market opportunity. Wearable devices incorporating FPAA technology will be easier and safer to use, less obtrusive, and communicate more accurately.