Low Power Monolayer MoS2 Transistors for RF Applications

Period of Performance: 08/25/2014 - 02/28/2015


Phase 1 STTR

Recipient Firm

Applied Novel Devices
15844 garrison circle Array
Austin, TX 78717
Principal Investigator
Firm POC

Research Institution

University of Texas at Austin
10100 Burnet Road, Bldg 160 J. J. Pickle Research Campus
Austin, TX 78758
Institution POC


The objective of this proposal is to demonstrate the feasibility of producing large area, single crystal monolayer Molybdenum disulfide (MoS2) for high frequency applications. In order to be able to achieve this aim, it is necessary to work on three main components: (a) the channel material itself, (b) the gate dielectric and (c) the drain/ source contacts to the channel material. This work proposes to use optimization of chemical vapor deposition (CVD) growth parameters for obtaining large domain single layer MoS2 on device quality substrates, use of hexagonal Boron Nitride (h-BN) as a dielectric and its growth directly on Si-SiO2 to remove the need for any transfer before MoS2 growth and the use of highly conductive defects on the MoS2 surface to enhance charge injection in the metal- semiconductor interface.