Computing With Chaos

Period of Performance: 06/04/2014 - 12/04/2015


Phase 2 STTR

Recipient Firm

FirstPass Engineering PC
864 Hapy Canyon Road Suite 10
Castle Rock, CO -
Principal Investigator
Firm POC

Research Institution

University of Hawaii at Manoa
Office of Research Services
Honolulu, HI 96822
Institution POC


Our initial, practical and potentially commercial approach, based upon years of basic and applied research in chaotic computation, was developed in Phase I of our project. Following upon phase I of the STTR project we propose, in Phase II, to engineer, synthesize, and exploit the rich, intrinsic dynamics of nonlinear and chaotic circuits and systems to implement reconfigurable, secure and noise resistant computational hardware approaches for nonlinear and chaos based computations. Specifically, we will focus on designing, fabricating and testing a chaos base computer architectures consisting of robust individual and arrays of chaos based logic and computational elements which we will then evaluate and test to investigate the advantages of the new fabricated computational elements over currently available hardware. In phase I, we introduced and studied the potential advantages of the chaos based computing systems, namely reconfigurability, robustness to noise, secure logic functions, and adaptability.