Miniature Intelligent Sensor Electronics

Period of Performance: 01/01/2003 - 12/31/2003


Phase 1 SBIR

Recipient Firm

11409 Valley View Road
Eden Prairie, MN 55344
Principal Investigator
Firm POC


The proposed system uses a combined hard-core processor/programmable-logic chip to implement the front-end control and processing functions of an intelligent sensor system. Combining these functions in a single chip is an innovation, relative to a traditional processor-only based system, because it provides re-configurable control of the sensor interface, i.e. analog and digital I/O and signal conditioning electronics, while freeing up the processor for computational tasks - yet maintaining tight coupling between the two functions. To embed intelligent functions on sensors, the proposed miniature, front-end electronics will combine at least 32 MB of RAM and a 200 MHz, 32-bit RISC processor with a flexible sensor interface that consists of two analog input and two analog output channels, with programmable gain, programmable anti-aliasing filters, and automatic calibration, and eight digital I/O channels. An Ethernet communication port will be available. The processor will be programmable using C/C++. Provisions for expansion to four each of the analog input and output channels and sixteen digital I/O channels will be included in the design. The final system will be no larger than 4 x 4 x 2. A programming kit for a PC will be part of the final development.